Skipping Compilation - 2025.2 English - UG900

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2025-12-17
Version
2025.2 English

You can run simulation on an existing snapshot and skip the compilation (or recompilation) of the design. To skip compilation, set the SKIP_COMPILATION property on the simulation fileset:

set_property SKIP_COMPILATION 1 [get_filesets sim_1]
Note: Any change to design files after the last compilation is not reflected in the simulation when you set this property.