Revision History - Revision History - 2026.1 English - UG900

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2026-07-08
Version
2026.1 English

The following table shows the revision history for this document.

Section Revision Summary
07/08/2026 Version 2026.1
General updates Editorial updates only. No technical content updates.
Supported Simulators Updated Supported Simulators table.
Cross Probing Signals in the Object, Wave, and Text Editor Windows Updated this section.
export_xsim_coverage Added a new section on export_xsim_coverage.
write_xsim_coverage Added a new section on write_xsim_coverage.
Code Coverage Support Updated this section.
VHDL 2008 Support in Vivado Simulator Updated the Supported Features subsection.
VHDL 2019 Support in Vivado Simulator Updated the Supported Features subsection.
SystemC Simulation Using Vivado Updated this section.
Verilog Language Support Exceptions Updated this section.
xsi_open Updated this section.