Protected Models - 2025.1 English - UG900

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2025-05-29
Version
2025.1 English

The protected models are pre-compiled and released in the form of a shared library that is built for the respective simulator. This shared library is packaged as part of the AMD Vivado™ install and based on the design configuration these models are bonded during elaboration. The following two protected models are delivered as part of Vivado install:

  • AI Engine
  • Network on chip (NoC)

These models are in the form of shared library present in the following installation path:

<Vivado-install-path>/data/simmodels/<simulator>/<simulator_version>/<os_type>/<gcc_version>/systemc/protected
Vivado simulator
<Vivado-install-path>/data/simmodels/xsim/2025.1/lnx64/9.3.0/systemc/protected
Xcelium simulator
<Vivado-install-path>/data/simmodels/xcelium/24.09.001/lnx64/9.3.0/systemc/protected
Questa Advanced Simulator
<Vivado-install-path>/data/simmodels/questa/2024.3_3/lnx64/7.4.0/systemc/protected
VCS Simulator
<Vivado-install-path>/data/simmodels/vcs/W-2024.09-SP1/lnx64/9.2.0/systemc/protected/
Riviera
<Vivado-install-path>/data/simmodels/riviera/2024.10/lnx64/9.3.0/systemc/protected/
Note: Versal models such as the AI Engine and NoC are not supported for post-synthesis simulation.