Examples - Examples - 2026.1 English - UG900

• Running behavioral simulation using Vivado simulator.

  create_project project_1 project_1 -part xc7vx485tffg1157-1
  add_files -norecurse tmp.v
  add_files -fileset sim_1 -norecurse testbench.v
  import_files -force -norecurse
  update_compile_order -fileset sources_1
  update_compile_order -fileset sim_1
  launch_simulation

• Generating script for behavioral simulation with Questa Advanced Simulator.

  create_project project_1 project_1 -part xc7vx485tffg1157-1
  add_files -norecurse tmp.v
  add_files -fileset sim_1 -norecurse testbench.v
  import_files -force -norecurse
  update_compile_order -fileset sources_1
  update_compile_order -fileset sim_1
  set_property target_simulator Questa [current_project]
  set_property compxlib.questa_compiled_library_dir <compiled_library_location> 
  [current_project]
  launch_simulation -scripts_only

• Launching post-synthesis functional simulation using Synopsys VCS.

  set_property target_simulator VCS [current_project]
  set_property compxlib.vcs_compiled_library_dir <compiled_library_location> 
  [current_project]
  launch_simulation -mode post-synthesis -type functional

• Running post-implementation timing simulation using Synopsys VCS.

  set_property target_simulator vcs [current_project]
  set_property compxlib.vcs_compiled_library_dir <compiled_library_location> [current_project] 
  launch_simulation -mode post-implementation -type timing

Running the Design in Non-Precompile Mode

By default, the launch_simulation command compiles the design files and binds the pre-compiled IP/simulation models during elaboration. These pre-compiled IP/simulation models can be compiled with the design as well in the local run directory. In that case the relevant source files of these IP/simulation models are added in the .do/prj/sh file for compilation. To run the design in non-precompile mode, unselect Project Settings > IP > Precompiled IP simulation libraries check-box or set the following property to false from the Tcl Console.

 set_property sim.use_ip_compiled_libs false [current_project]