Importing HDL Modules - 2020.2 English - UG897

Vivado Design Suite User Guide: Model-Based DSP Design Using System Generator (UG897)
Document ID
UG897
Release Date
2020-11-18
Version
2020.2 English

Sometimes it is important to add one or more existing HDL modules to a System Generator design. The System Generator Black Box block allows VHDL, and Verilog, to be brought into a design. The Black Box block behaves like other System Generator blocks - it is wired into the design, participates in simulations, and is compiled into hardware. When System Generator compiles a Black Box block, it automatically connects the ports of the Black Box to the rest of the design. A Black Box can be configured to support either synchronous clock designs or multiple hardware clock designs based on the context and System Generator token settings.

The Black Box Interface
Black Box HDL Requirements and Restrictions Details the requirements and restrictions for VHDL, Verilog, and EDIF associated with black boxes.
Black Box Configuration Wizard Describes how to use the Black Box Configuration Wizard.
Black Box Configuration M-Function Describes how to create a black box configuration M-function.
HDL Co-Simulation
Configuring the HDL Simulator Explains how to configure the Vivado® simulator or ModelSim to co-simulate the HDL in the Black Box block.
Co-Simulating Multiple Black Boxes Describes how to co-simulate several Black Box blocks in a single HDL simulator session.