AMD supports netlists created by third-party synthesis tools for user logic. When using AMD IP the only supported synthesis tool is the Vivado synthesis tool. The Vivado Design Suite infers a black box during logic synthesis for AMD IP. A file is provided to infer the black box as described in the following sections. The Vivado Design Suite resolves the black boxes during implementation. Synthesis of AMD IP is supported with the Vivado synthesis tool only, including the IP core and any example design files an IP might deliver.
Video: See the Vivado Design Suite QuickTake Video: Using IP with
Third-Party Synthesis Tools for more information.
Important:
AMD encrypts IP HDL files with the IEEE Recommended Practice for
Encryption and Management of Electronic Design Intellectual Property (IP) (IEEE Std
P1735). Consequently, IP HDL files are readable only when using Vivado synthesis. You
can use a third-party synthesis tool for the end-user logic and generate a netlist that
Vivado implementation can use. Support is enabled for third-party simulation tools to
perform behavioral simulations using the encrypted RTL.