IP integrator runs basic design rule checks in real time as it assembles the
design. However, design errors can still occur, such as incorrectly setting a clock
pin's frequency. The IP integrator can catch these types of errors by running a more
thorough design validation. You can run design validation by selecting or through the Tcl command validate_bd_design.
The Validate Design command applies design rule checks on the block design and reports warnings and/or errors found in the design. You can cross-probe the warnings or errors from the Messages window to locate objects in the block diagram. AMD recommends validating a block design to catch errors that would otherwise be found later in the design flow.
Running design validation also triggers Parameter Propagation on the block design. Parameter Propagation enables IP integrator to automatically update the parameters associated with a given IP based on its context and its connections in the design. You can package custom IP with specific parameter propagation rules. IP integrator applies these rules while generating and validating the block diagram. Refer to the Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994) for more information.