In Project Mode, the AMD Vivado™ Design Suite creates a project directory structure and automatically manages source files, constraints, IP data, synthesis and implementation run results, and reports. It also tracks and reports the status of the source files, configuration, and the state of the design.
In the Vivado IDE, use the Flow Navigator to launch predefined design flow steps such as synthesis and implementation. When you click Generate Bitstream or Generate Device Image for AMD Versal™ adaptive SoCs, Vivado ensures the design is current before generating the output file. This mode provides an intuitive push-button workflow, plus advanced design management and analysis features.
Runs in Project Mode launch with wrapper Tcl scripts that consolidate implementation commands and generate standard reports. You can apply different run strategies to address design challenges, such as routing density and timing closure. You can also launch multiple implementation runs simultaneously to compare results.
You can use Project Mode through the Vivado IDE or with Tcl commands and scripts. You can also switch between IDE and Tcl within a project. When you open or create projects in the Vivado IDE, you refer to the current design state, run results, and previously generated reports. You can create or modify sources, apply constraints and debug information, configure tool settings, and perform design tasks.
Vivado lets you open the design at various stages of the flow. You can analyze or define constraints after RTL elaboration, synthesis, or implementation. When you open a design, Vivado compiles the netlist and constraints against the target device and displays it in the IDE. After opening, you can use analysis and reporting tools to review different criteria and viewpoints, and you can save constraint and design changes. For more details, refer to Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906).