Simulation Flow Overview - Simulation Flow Overview - 2026.1 English - UG892

Vivado Design Suite User Guide: Design Flows Overview (UG892)

Document ID
UG892
Release Date
2026-06-23
Version
2026.1 English

Follow these practices when simulating in Vivado Design Suite. Many of these tips are described in greater detail the Vivado Design Suite User Guide: Logic Simulation (UG900).

  1. Run behavioral simulation before synthesis and implementation to catch issues early.
  2. Infer logic wherever possible; instantiating primitives increases simulation runtime cost.
  3. Set the simulator language to mixed unless your simulator license does not support mixed mode.
  4. Turn off the waveform viewer when not used to improve simulation performance.
  5. In the Vivado simulator, turn off debug during xelab for faster performance.
  6. In the Vivado simulator, enable multi-threading to reduce compile time.
  7. When using third-party simulators, target supported versions (refer to the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973).
  8. Enable incremental compile when using third-party simulators.
  9. Use the AMD Tcl command export_simulation to generate batch scripts for selected simulators.
  10. Generate simulation scripts for individual IP, block designs, and hierarchical modules, and the top-level design.
  11. For 7 series devices, use UNIFAST libraries to improve simulation performance.
    Note: Vivado does not support UNIFAST libraries for UltraScale device primitives.