The Module Reference feature in Vivado IP integrator lets you quickly add a module or entity from a Verilog or VHDL source file into your block design. This allows you to include RTL modules without packaging them as IP for the Vivado IP catalog.
The Module Reference flow is fast but it does not work with the IP catalog. Both flows have benefits and limitations. For more details, refer to the Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994).