When you open an implemented design, Vivado loads the implemented netlist and applies the physical and timing constraints from implementation, placement, and routing. Vivado stores placed logic and routed connections in memory so you can analyze and modify elements as needed. You can save updates to constraints files, netlist, implementation results, and design configuration. Because Vivado allows multiple implementation runs, select any completed run to open its implemented design.
In an implemented design, perform timing analysis, power analysis, and generate utilization statistics to verify performance targets. Explore the design using Vivado IDE windows, with selected objects cross-selected in related views. Cross probe source RTL lines from windows such as Messages, Schematic, Device, Package, and Find. Use the Schematic window to explore logic interconnect and hierarchy interactively. Apply timing constraints, run timing analysis, apply floorplanning constraints, and save them for future runs.
Use the Device window
to explore placement and routing results by toggling the Routing
Resources button 
. Zoom in to view increasing detail in the
Device window.
Interactively adjust placement, routing, and design configuration, such as LUT equations
and RAM initialization. Select results in Device or Schematic windows to cross probe to RTL problem lines. The
Schematic window provides an interactive view of logic interconnect and hierarchy.
For more information, refer to the Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906).
To open an implemented design, use one of the following methods:
- In the Implementation section of the Flow Navigator, select Open Implemented Design.
- From the menu, select .
- In the Design Runs view, double-click the run name.
The following figure shows the default layout view for an open implemented design.