You can use the Vivado IDE I/O pin planning environment to assign I/O ports to specific device package pins or internal die pads. The pin planner provides tables to help you design and analyze package and I/O-related data. Assign memory interfaces interactively into specific I/O banks for optimal data flow. Analyze device and design-related I/O data using the provided views and tables.
The tool includes I/O DRC and simultaneous switching noise (SSN) analysis commands to validate your I/O assignments. For more information, refer to the Vivado Design Suite User Guide: I/O and Clock Planning (UG899).