Generating IP Output Products - Generating IP Output Products - 2026.1 English - UG892

Vivado Design Suite User Guide: Design Flows Overview (UG892)

Document ID
UG892
Release Date
2026-06-23
Version
2026.1 English

IP output products enable synthesis, simulation, and implementation tools to use a specific IP configuration. While generating output products, Vivado IDE sets up a directory structure to store related files. Leave the folder structure intact. The Vivado Design Suite generates the following output products:

  • Instantiation template
  • RTL source files and XDC constraints
  • Synthesized design checkpoint (default)
  • Third-party simulation sources
  • Third-party synthesis sources
  • Example design (if applicable)
  • Test bench (if applicable)
  • C Model (if applicable)
Tip: In Project Mode, missing output products generate automatically during synthesis, including a synthesized DCP file for the OOC flow. In Non-Project Mode, you must manually generate them before global synthesis.

For each customized IP, generate all available output products, including a synthesized design checkpoint. This gives you a complete IP representation that you can archive or place under revision control. If future Vivado Design Suite versions omit that IP or change undesirably, you still retain everything needed for simulation, synthesis, and implementation.