Vivado delivers precompiled simulation libraries for the Vivado simulator, including static files required by AMD IP. Simulation scripts reference these precompiled libraries automatically.
When using third-party simulators, compile AMD simulation libraries before running simulation. This is important if your design instantiates VHDL primitives or AMD IP, which are primarily VHDL. If you do not precompile libraries, the tool reports library binding failures. For details, refer to the Vivado Design Suite User Guide: Logic Simulation (UG900).
Run the compile_simlib Tcl Tcl command to
compile AMD simulation libraries for the target
simulator. You can also select in the Vivado IDE to issue this
command.