When you open an implemented design, Vivado displays placement and routing results in the Device window. In the Timing Results window, select timing paths to highlight placement and routing for the selected path in the Device window.
You can interactively edit placement and routing to achieve design goals and change design characteristics, such as LUT equations, RAM initialization, and phaselocked loop (PLL) configuration. For more information, refer to Vivado Design Suite User Guide: Implementation (UG904).
Important:
Vivado applies changes only to the in-memory version of the implemented
design. Resetting the run removes them. To keep changes, select Save
Checkpoint as described in Saving Design Changes to Design Checkpoints.