Voltage ID is a feature for selected SKUs of Versal adaptive SoC devices to power key rails (VCC_AIE, VCC_FPD) at the optimal voltage determined at wafer sort and is unique to each device. Each device’s specific VID value is stored in the eFUSEs and then applied by programming the targeted voltage regulators during boot via the VID drivers. VID reduces static and dynamic power consumption and provides optimized performance/power based on actual silicon characteristics leading to better device binning and SKU differentiation. Programming of the VID rails is completed on boot of the device with VID drivers through the PLM.
Hardware Requirements for Implementing VID
- VID-enabled rails must not be merged with other rails because each VID rail has a unique voltage.
- The voltage regulator must support I²C or PMBus digital programming of the output voltage.
- The voltage regulator must support voltage setpoint resolution of ≤ 5 mV step size.
- The voltage regulator must be capable of powering in the range of 0.8V to 0.88V (VCC_FPD) and 0.725V to 0.8V (VCC_AIE).
- The voltage regulator must be capable of powering in the range of 0.8V to 0.88V (VCC_FPD) and 0.725V to 0.8V (VCC_AIE).
Figure 1. VID Block Diagram
