MIPI C-PHY - MIPI C-PHY - UG863

Versal Adaptive SoC PCB Design User Guide (UG863)

Document ID
UG863
Release Date
2026-02-20
Revision
1.11 English

MIPI C-PHY is intended for use in mobile and embedded devices including cameras, displays, and unified protocol interfaces supporting MIPI DSI-2 and CSI-2. This standard is supported in the X5IO banks of the Versal adaptive SoCs. Support for this standard in Versal devices is in adherence to the MIPI alliance interface specifications.

MIPI C-PHY cores consist of one or more three-wire lanes, as shown in the following figure. MIPI C-PHY lanes have embedded clocking, and no separate clock channels are required.

Figure 1. MIPI C-PHY Transmitter and Receiver Paths

MIPI C-PHY PCB guidelines for impedance, channel requirements, spacing, skew, and termination are shown in the following table.

Table 1. MIPI C-PHY PCB Trace and Skew Guidelines
Parameter Specification
Trace type Stripline
Differential impedance between all pairs in trio A-B, B-C, and A-C 100 Ω ± 10%
Single ended impedance 50 Ω + 10%
Channel requirement C-PHY insertion loss specification 1
Spacing in trio 2.5X trace width
Spacing to other MIPI C-PHY trio 5X trace width
Spacing to other non-MIPI C-PHY signals 6X trace width
Skew between lines in lane trio ±2 ps 2
Skew between lanes 160 ps 2
Termination at receiver 50 Ω single-ended 3
  1. Channels are categorized into short/standard reach based on the C-PHY insertion loss specification. For achievable system-level performance with specific channels at required speed, refer to the Channel Rate Guidance as a Function of Interconnect and Feature Set table in the MIPI C-PHY specifications (https://www.mipi.org/specifications/c-phy) and AMD device C-PHY signal integrity recommendation to decide if equalization should be enabled as well as the proper equalization setting for the transmitter and receiver.
  2. Include adaptive SoC package delays for all skew calculations.
  3. When adaptive SoC/FPGA/MPSoC is the receiver, 50 Ω on-chip termination is required via the CPHY_TERM attribute. Refer to the MIPI_CPHY section in Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010).