Some I/O standards (POD10, POD12, HSUL_12, and DIFF_HSUL_12) require an input termination resistance (R) to a VTT voltage of VCCO (see the following figure).
HP I/O DCI input standards supporting single termination are shown in the following table.
| POD | DIFF_POD | HSUL/DIFF_HSUL |
|---|---|---|
| POD12_DCI | DIFF_POD12_DCI | HSUL_12_DCI |
| POD10_DCI | DIFF_POD10_DCI | DIFF_HSUL_12_DCI |
XP5IO I/O DCI input standards supporting single termination are shown in the following table.
| POD | DIFF_POD | HSUL | DIFF_HSUL |
|---|---|---|---|
| POD12 | DIFF_POD12 | HSUL_12 | DIFF_HSUL_12 |
| POD10 | DIFF_POD10 |
Single-termination DCI creates a termination to VCCO internally as shown in the following figure. The value of the termination resistor is determined by the ODT attribute. Possible values for ODT are listed here:
- POD standards only: RTT_40, RTT_48, and RTT_60
- HSUL_12_DCI and DIFF_HSUL_12_DCI only: RTT_120 and RTT_240
- RTT_NONE
For example, to achieve single termination of approximately 50 Ω to VCCO for the POD12_DCI standard, a 240 Ω external precision resistor is required at the VRP pin, and ODT must be set to the value of RTT_48.
In XP5IO, single termination to VCCO is supported in POD and HSUL through the ODT attribute. In addition to single termination to VCCO, XP5IO support several standards that leverage single termination to ground with the LVSTL I/O standards. Enabling an ODT attribute enables single termination to ground.
XP5IO I/O DCI input standards supporting single termination to GND are shown in the following table.
| LVSTL | DIFF_LVSTL |
|---|---|
| LVSTL06_12 | DIFF_LVSTL06_12 |
| LVSTL_11 | DIFF_LVSTL_11 |
| LVSTL05_10 | DIFF_LVSTL05_10 |