SSTL18_I_DCI, DIFF_SSTL18_I_DCI - SSTL18_I_DCI, DIFF_SSTL18_I_DCI - UG861

Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)

Document ID
UG861
Release Date
2026-04-28
Revision
1.1 English
Table 1. Available I/O Bank Type
HD HP
N/A Available

Class-I drivers can be preferred for short, point-to-point board topologies. DCI provides tuned internal parallel split-termination resistors that are always present. The value of the ODT attributes represents the Thevenin equivalent resistance of R (where R = Z0) to the VCCO/2 mid-point level. The source termination feature (OUTPUT_IMPEDANCE) provides the option of 40 Ω, 48 Ω, or 60 Ω tuned driver impedance in HP I/O banks. The driver output impedance is set to a default of 40 Ω. The differential (DIFF_) version uses complementary single-ended drivers for outputs, and differential receivers for inputs.