Revision History - Revision History

Revision History - Revision History - UG861

Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)

Document ID

UG861

Release Date

2026-04-28

Revision

1.1 English

The following table shows the revision history for this document.

Section	Revision Summary
04/28/2026 Version 1.1
General updates	Added XP5IO throughout.
I/O Tile Overview	Updated paragraph describing supported HP, HD, and XP5IO bank combinations. Updated bullet describing XP5IO banks. Updated notes in Table 1.
XP5IO Bank	Updated section.
HP I/O Bank Overview	Added MIPI D-PHY to second bullet.
XP5IO I/O Bank Overview	Updated description of CCIO pins.
I/O Bank Rules	Updated wording in first paragraph and removed Spartan UltraScale+ device number. Updated Figure 1.
VCCAUX_IO, VCCAUX_HDIO, VCCAUX_HPIO, and VCCAUX_XP5IO	Added V_{CCAUX_HDIO}, V_{CCAUX_HPIO}, and V_{CCAUX_XP5IO}.
VCCINT_HPIO and VCCINT_XP5IO	Rewrote section.
State of I/Os During and After Configuration	Updated description of PUDC_B.
Introduction	Differentiated into sections for DCI in HP I/O banks and XP5IO banks.
Table 2 Table 2 Table 2 Table 3 Table 2	Added tables.
VRP External Resistance Design Migration Guidelines	Updated description of DCI functionality.
Receiver Offset Control in HP I/O Banks	Added note.
Internal VREF in XP5IO I/O Banks	Added section.
SelectIO IOB Interface Primitives	Added primitives for XP5IO I/O banks.
IBUF_IBUFDISABLE and IBUF_IBUFDISABLE_XP5	Added IBUF_IBUFDISABLE_XP5.
IBUFE3 and IBUFE3_XP5	Added IBUFE3_XP5.
IBUFDS_DIFF_OUT_IBUFDISABLE and IBUFDS_DIFF_OUT_IBUFDISABLE_XP5	Added IBUFDS_DIFF_OUT_IBUFDISABLE_XP5.
IBUFDS_IBUFDISABLE and IBUFDS_IBUFDISABLE_XP5	Added IBUFDS_IBUFDISABLE_XP5.
IBUFDSE3 and IBUFDSE3_XP5	Added IBUFDSE3_XP5.
IOBUFDS_DIFF_OUT and IOBUFDS_DIFF_OUT_XP5	Added IOBUFDS_DIFF_OUT_XP5.
IOBUFDSE3 and IOBUFDSE3_XP5	Added IOBUFDSE3_XP5.
HPIO_VREF and XP5IO_VREF	Added XP5IO_VREF.
Output Slew Rate Attributes	Added note.
Table 1	Added columns for XP5IO I/O banks. Added LVCMOS10, LVCMOS11, and LVCMOS135 standards. Updated allowed and default values of HD I/O bank current drive and default values of HP I/O bank current drive for LVCMOS12 standard. Updated allowed and default values of HD I/O bank current drive for LVCMOS15 standard. Removed note.
DC_BIAS in XP5IO I/O banks	Added new topic.
Receiver EQUALIZATION	Added EQ_LEVEL5, EQ_LEVEL6, EQ_LEVEL7, and EQ_LEVEL8 for XP5IO I/O banks.
Table 4 Table 5	Added note about DRIVE of 2 and 4.
Table 6 Table 2 Table 2	Added tables.
HSTL Class I Termination and Differential HSTL Class I Termination	Updated topic title.
HSTL Allowed Attributes	Added the following tables: Table 2 Table 3 Table 4
Table 1	Updated table title and split into the following: Table 2 Table 3 Table 4
Differential POD Termination	Split POD Allowed Attributes into Table 1 and Table 2. Updated slew column for RDRV_40_40 (40 Ω) in Table 3. Updated slew column for RDRV_40_40 (40 Ω), RDRV_48_48 (48 Ω), and RDRV_60_60 (60 Ω) in Table 4.
Low-Voltage Swing Terminated Logic (LVSTL)	Added new topic.
MIPI_DPHY and MIPI_DPHY_DCI I/O Standard	Added "MIPI_DPHY" to title. Added Table 3.
Internal Differential Termination Behavior in Differential I/O Standards in HP I/O Banks	Removed LVDS_25, PPDS_25, RSDS_25, and MINI_LVDS_25 standards.
Table 1	Added LVDS15, MIPI_DPHY_DCI, MIPI_DPHY I/O standards. Removed BLVDS_25 standard.
Table 2	Added LVDS15, MIPI_DPHY_DCI, MIPI_DPHY I/O standards. Updated output slew for LVSTL05_10, LVSTL06_12, LVSTL_11, POD12, DIFF_LVSTL05_10, DIFF_LVSTL06_12, DIFF_LVSTL_11, and DIFF_POD12.
HD I/O Interface Logic Resources	Added "Performance Considerations" subsection.
XP5IO I/O Interface Logic Resources	Added description of XP5PHY_HS and XP5PHY_LS. Updated bullet about PHY based interfaces.
XP5IO PHY Nibble	Added description of inter-byte and inter-nibble clocking.
Controlling IBUF_DISABLE and DYN_DCI XP5PHY_LS Ports XP5PHY_LS Attributes XP5PHY_HS Ports	Added new sections.
12/23/2024 Version 1.0
Initial release.	N/A