POD10_DCI, POD12_DCI, DIFF_POD10_DCI, and DIFF_POD12_DCI - POD10_DCI, POD12_DCI, DIFF_POD10_DCI, and DIFF_POD12_DCI

POD10_DCI, POD12_DCI, DIFF_POD10_DCI, and DIFF_POD12_DCI - POD10_DCI, POD12_DCI, DIFF_POD10_DCI, and DIFF_POD12_DCI - UG861

Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)

Document ID

UG861

Release Date

2026-04-28

Revision

1.1 English

Table 1. Available I/O Bank Type
HD	HP	XP5IO
N/A	Available	N/A

DCI provides a tuned single termination to V_CCO at the receiver that matches the ODT attribute setting. The differential (DIFF_) versions use complementary single-ended drivers for outputs, and differential receivers for inputs.

DCI provides a tuned single ODT pull-up to V_CCO in the receivers and a source termination option (OUTPUT_IMPEDANCE) of 40 Ω, 48 Ω, or 60 Ω in the driver. The driver output impedance is set to a default of 40 Ω. POD12 standards also have optional EQUALIZATION and OFFSET_CNTRL features in the receivers and PRE_EMPHASIS in the drivers.