The VREF for I/O banks can be (optionally) generated inside Spartan UltraScale+ devices. Internal generation removes the need to provide for a particular VREF supply rail on the printed circuit board (PCB). The internally generated VREF (INTERNAL_VREF) is sourced from the VCCO.
In HP I/O banks, there is one VREF plane per bank and each bank can have the optional INTERNAL_VREF set to a single voltage level for the entire bank.
The constraint INTERNAL_VREF is assigned to one bank at a time.
Example 1: INTERNAL_VREF for Bank 46 using HSTL_I (1.5V), which requires a 0.75V reference voltage, uses the following constraint:
set_property
INTERNAL_VREF 0.75 [get_iobanks 46]
Example 2: INTERNAL_VREF for Bank 47 using HSTL_I_18 (1.8V), which requires a 0.9V reference voltage, uses the following constraint.
set_property
INTERNAL_VREF 0.90 [get_iobanks 47]
The rules for using INTERNAL_VREF are:
- One value of VREF can be set for the bank.
- INTERNAL_VREF can only be set to the nominal reference voltage value of a given I/O standard.
- Valid settings of
INTERNAL_VREF are listed below:
- 0.60
- 0.675
- 0.70
- 0.75
- 0.84
- 0.90
- VREF is a dedicated pin and cannot be used as a normal I/O pin even when INTERNAL_VREF is used.
The rules for combining I/O standards in the same bank also apply for INTERNAL_VREF. In HP I/O banks only, an internal VREF scan feature is available for internal VREF control. To use the VREF scan feature in a bank, the INTERNAL_VREF must be set to the appropriate VREF value for the I/O standards used in that bank. The internal VREF scan is invoked using either the IBUFE3 or IOBUFE3 primitive with the HPIO_VREF primitive.
Within an HP I/O bank, you cannot combine or use both the internal VREF (INTERNAL_VREF or VREF scan) with the external VREF pins. When either INTERNAL_VREF or VREF scan is used in a bank, connect the dedicated external VREF pins to GND through a 500 Ω or 1 KΩ resistor.