Inter-Byte Clocking - Inter-Byte Clocking - UG861

Inter-byte clocking allows clock sharing between a clock arriving at a BITSLICE_0 of one nibble and the nibbles in the same position of other bytes (see Figure 1). Sharing of the input or sample clock is done through CLK_TO_EXT_NORTH(SOUTH) output pins and CLK_FROM_EXT input pins in BITSLICE_CONTROL components of other bytes. Inter-byte clocking is started by setting attributes EN_CLK_TO_EXT_NORTH(SOUTH).

Inter-nibble and inter-byte clocking can be combined to serve all bit slices in an I/O bank with the same clock (see the following figure).

Notes on the preceding figure.

• Assume that byte_2, lower nibble, RX_BITSLICE_0 is set up as a clock or strobe input.
• Byte_2, upper nibble must be inter-nibble clock-enabled.
• Because the lower nibble of byte_2 is used as clock input, and all nibbles are used in multi-byte setup, for all bytes the lower nibble must supply the clock to the upper nibble for inter-nibble clocking.
• Byte_3, lower nibble, gets a clock from the CLK_TO_EXT_NORTH output of the lower nibble of byte 2 on its CLK_FROM_EXT input.
• The lower byte south (down) of byte_2, lower nibble supplies a clock from the CLK_TO_EXT_SOUTH output to the CLK_FROM_EXT input of the lower nibble of byte 1.
• To reach the lower nibble of byte 0, the CLK_TO_EXT_SOUTH output of byte 1 must be connected to the CLK_FROM_EXT input of the lower nibble of byte 0. A jump over is made inside byte 1 between the CLK_FROM_EXT and CLK_TO_EXT_SOUTH pins. As such, all receivers in all nibbles are configured to receive data from a forwarded version (via inter-byte/nibble) of the strobe sourced from the byte_2 upper nibble.

The attribute setups for this example are listed in the following tables.

For all nibbles, inter-nibble clocking must be enabled as listed in the following table.