Note: IDDRE1 components used in a design are translated and implemented
by the Vivado design tools as ISERDESE3 components.
The following table lists the IDDRE1 ports.
| Port | I/O | Description |
|---|---|---|
| Q1, Q2 | Output | IDDRE1 register outputs |
| C | Input | Clock input pin |
| CB | Input | Inverted clock input pin when IS_C_INVERTED = 0 and IS_CB_INVERTED = 0 |
| D | Input | Register input from IOB |
| R | Input | Asynchronous reset, release synchronous to C/CB |