IBUF_LOW_PWR Attribute (HP and XP5IO I/O Banks Only) - IBUF_LOW_PWR Attribute (HP and XP5IO I/O Banks Only) - UG861

Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)

Document ID
UG861
Release Date
2026-04-28
Revision
1.1 English

The IBUF_LOW_PWR attribute allows an optional trade-off between performance and power. This attribute is set to TRUE by default, which implements the input buffer in the lower-power rather than the higher-performance mode.

The change in power between high-performance and low-power mode can be estimated using the Xilinx Power Estimator (XPE) spreadsheet tool (download at www.amd.com/power).

The IBUF_LOW_PWR attribute is applied to the I/O buffer instance and uses the following syntax in the XDC file:

set_property IBUF_LOW_PWR TRUE|FALSE [get_ports port_name ]

See the UltraScale Architecture Libraries Guide (UG974) for information on accessing this attribute in UNISIM instantiation.