The IBUF_IBUFDISABLE (HD and HP I/O banks only) and IBUF_IBUFDISABLE_XP5 (XP5IO I/O banks only) primitives shown in the following figure is an input buffer with a disable port that can be used as an additional power saving feature for periods when the input is not used.
While both buffers disable the buffer, the IBUF_IBUFDISABLE primitive can disable the input buffer and force the O output to the internal logic to a logic Low when the IBUFDISABLE signal is asserted High. In the IBUF_IBUDISABLE_XP5, when the IBUDISABLE signal is asserted High, the O output to the internal logic is held High.
The USE_IBUFDISABLE attribute must be set to TRUE, the IBUFDISABLE port must be controlled and SIM_DEVICE set to ULTRASCALE_PLUS for this primitive to have the expected behavior that is specific to the Spartan UltraScale+ devices. This feature can be used to reduce power at times when the I/O is idle. Input buffers that use the VREF power rail (such as SSTL and HSTL) benefit the most from the IBUFDISABLE signal being set to a logic High because they tend to have higher static power consumption than the non-VREF standards such as LVCMOS and LVTTL.