IBUFE3 and IBUFE3_XP5 - IBUFE3 and IBUFE3_XP5 - UG861

Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)
Document ID
UG861
Release Date
2026-04-28
Revision
1.1 English

The input buffer (IBUFE3) primitive (shown in the following figure) is only supported in HP I/O banks. This UltraScale architecture specific primitive has functions similar to the IBUF_IBUFDISABLE and IBUF_IBUFDISABLE_XP5 with added controls for offset calibration and VREF tuning, along with input buffer disable (IBUFDISABLE). The offset calibration feature is accessed using the OSC_EN and OSC[3:0] ports. The VREF scan feature is accessed using the HPIO_VREF primitive with IBUFE3.

Figure 1. IBUFE3 Primitive—Input Buffer with Offset Calibration and VREF Tuning (HP I/O Banks Only)

The IBUFE3_XP5 is only supported in XP5IO I/O banks. This UltraScale+ architecture specific primitive has functions similar to the IBUF_IBUFDISABLE and IBUF_IBUFDISABLE_XP5 with added controls for offset calibration and VREF tuning, along with input buffer disable (IBUFDISABLE). The offset calibration feature is accessed using the OSC_EN and OSC[3:0] ports. The VREF scan feature is accessed using the XP5IO_VREF primitive with IBUFE3_XP5.

Note: IBUFE3 and IBUFE3_XP5IO buffers have similar functionality but are differentiated due to IBUFDISABLE functionality differences. HP I/O banks drive the O pin Low when IBUFDISABLE is asserted High, while XP5IO I/O banks assert the O pin High when IBUFDISABLE is asserted.