The HSTL standard is a general-purpose high-speed bus standard is defined by JEDEC (JESD8-6). To support clocking high-speed memory interfaces, differential versions are also available. The UltraScale architecture I/O supports class-I for the 1.2V version (in HP and XP5IO I/O banks) along with the 1.5V version and 1.8V versions (HP and HD I/O banks only), including the differential versions. The differential versions of the standard require a differential amplifier input buffer and a push-pull output buffer. The HP I/O banks also support "_DCI" versions of the HSTL standards.