DATA_RATE - DATA_RATE - UG861

Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)

Document ID
UG861
Release Date
2026-04-28
Revision
1.1 English

DATA_RATE is an info-only attribute that is used by power analysis, timing analysis, and SSN tools in the Vivado Design Suite. This attribute provides information regarding the toggle rate of the I/O to these tools.

Valid values of this attribute are:

  • Single data rate (SDR)
  • Double data rate (DDR)

In non-native PHY applications, the default value of this attribute is SDR. In native mode applications (if the I/O is connected to one of the native PHY primitives such as IDDRE1, ODDRE1, RX_BITSLICE, TX_BITSLICE etc.), the default value is DDR.

The DATA_RATE attribute uses the following syntax in the XDC file:

set_property DATA_RATE SDR|DDR [get_ports port_name ]