Controlled Impedance Driver (Source Termination) - Controlled Impedance Driver (Source Termination) - UG861

Spartan UltraScale+ FPGAs SelectIO Resources User Guide (UG861)

Document ID
UG861
Release Date
2026-04-28
Revision
1.1 English

To optimize signal integrity for high-speed or high-performance applications, extra measures are required to match the output impedance of drivers to the impedance of the transmission lines and receivers. Optimally, drivers must have an output impedance matching the characteristic impedance of the driven line, otherwise reflections can occur due to discontinuities. To solve this issue, designers sometimes use external-source series-termination resistors placed close to the pins of high-strength, low-impedance drivers. The resistance values are chosen such that the sum of the output impedance of the driver plus the resistance of the source series-termination resistor roughly equals the impedance of the transmission line.

DCI can provide controlled impedance output drivers to eliminate reflections without requiring the use of an external source-termination resistor. The impedance is derived from the external reference resistor.

The following figure illustrates a controlled impedance driver inside a device.

Figure 1. Controlled Impedance Driver

In HP banks, the use of controlled impedance DCI drivers is triggered by specific standards supporting the controlled impedance driver as shown in the following table.

Table 1. All DCI I/O Standards Supporting Controlled Impedance Driver in HP I/O Banks
HSTL/DIFF_HSTL LVDCI HSUL/DIFF_HSUL SSTL/DIFF_SSTL
HSTL_I_DCI LVDCI_18 HSUL_12_DCI SSTL18_I_DCI
HSTL_I_DCI_18 LVDCI_15 POD12_DCI SSTL15_DCI
HSTL_I_DCI_12 HSLVDCI_18 POD10_DCI SSTL135_DCI
DIFF_HSTL_I_DCI HSLVDCI_15 DIFF_HSUL_12_DCI SSTL12_DCI
DIFF_HSTL_I_DCI_18   DIFF_POD12_DCI DIFF_SSTL18_I_DCI
DIFF_HSTL_I_DCI_12   DIFF_POD10_DCI DIFF_SSTL15_DCI
      DIFF_SSTL135_DCI
      DIFF_SSTL12_DCI
Table 2. All DCI I/O Standards Supporting Controlled Impedance Driver in XP5IO I/O Banks
LVDCI SSTL/DIFF_SSTL LVSTL/DIFF_LVSTL HSUL/DIFF_HSUL POD/DIFF_POD HSTL/DIFF_HSTL
LVDCI_15 SSTL15 LVSTL06_12 HSUL_12 POD12 HSTL_I
HSLVDCI_15 SSTL135 LVSTL_11 DIFF_HSUL_12 POD10 HSTL_I_12
  SSTL12 LVSTL05_10   DIFF_POD12 DIFF_HSTL_I
  DIFF_SSTL15 DIFF_LVSTL06_12   DIFF_POD10 DIFF_HSTL_I_12
  DIFF_SSTL135 DIFF_LVSTL_11      
  DIFF_SSTL12 DIFF_LVSTL05_10