SelectMAP x32 Configuration Interface Example - SelectMAP x32 Configuration Interface Example - UG860

Refer to the following figure for the SelectMAP interface connectivity.

Figure Notes:

1. The processor I/O needs to support a voltage that is compatible with the connected FPGA pins.
2. The DONE pin is an open-drain output. An external pull-up resistor is required.
3. The INIT_B pin is a bidirectional, open-drain pin. An external pull-up resistor is required.
4. CCLK signal integrity is critical.
5. The FPGA PUDC_B pin is tied to GND to enable internal pull-ups or it can be tied to V_{CCO_0} to 3-state the SelectIOpins after power-up and during configuration.

6. Bank 65 and/or Bank 66 is used for the multi-function configuration I/O.