SPI x1 Mode Sequence - SPI x1 Mode Sequence - UG860

Spartan UltraScale+ FPGAs Configuration User Guide (UG860)

Document_ID
UG860
Release_Date
2026-07-27
Revision
v1.3 English

The SPI x1 mode allows the FPGA to be loaded from an external SPI flash device. The sequence is shown in the following figure.

Figure 1. SPI x1 Mode Sequence
Note: Waveforms represent the relative sequence of events and are not to scale. See the flash memory data sheet for detailed SPI command and data timing.