SPI Interface - SPI Interface - UG860

The master SPI configuration mode supports multiple data bus widths and setups. The master SPI configuration mode can read from standard 1-bit (x1), 2-bit (x2), and 4-bit (x4) SPI flash devices. Spartan UltraScale+ FPGAs internal configuration logic automatically detects and selects the widest bus-width available from the user setup.

The master SPI 2-bit and 4-bit configuration modes are proportionally faster than the standard 1-bit SPI interface. The master SPI configuration interface is represented in the following figure.

Figure 1. SPI Configuration Interface

Spartan UltraScale+ FPGAs support a master SPI 24-bit addressing configuration mode (SPI_24) or a 32-bit addressing configuration mode (SPI_32). The SPI_32 configuration mode option addresses flash sizes greater than 128 Mb.

Spartan UltraScale+ FPGAs also provide a 8-bit (x8) master OSPI configuration mode. See Master OSPI Configuration Mode for details.