The platform management controller oversees security features and the configuration process of the Spartan UltraScale+ FPGA. It includes a configuration controller that runs BootROM firmware and the platform loader manager to configure the device after power-up. The following diagram illustrates connections from the controllers to the main AXI4 switch, pathways to the configuration control unit, configuration interfaces, and security features. Supported configuration protocols and bus widths include JTAG (x1), slave serial (x1), slave SelectMAP (x8, x16, x32), master SPI (x1, x2, x4), and master OSPI (x1, x8). See Configuration Interface and Pin Planning for an overview of the interfaces and pins used in each configuration mode.
Figure Notes:
- Available only in the Spartan UltraScale+ SU45P, SU60P, SU65P, SU100P, SU150P, and SU200P devices.