Pin Descriptions - Pin Descriptions - UG860

Spartan UltraScale+ FPGAs Configuration User Guide (UG860)

Document_ID
UG860
Release_Date
2026-07-27
Revision
v1.3 English

The following table describes the MASTER_JTAG primitive pins.

Table 1. MASTER_JTAG Pin Descriptions
Pin Type Width Description
TCK Input 1 JTAG TCK clock pin.
TDI Input 1 JTAG TDI input pin.
TDO Output 1 JTAG TDO output pin.
TMS Input 1 JTAG TMS input pin.