Mode Pins - Mode Pins - UG860

Spartan UltraScale+ FPGAs Configuration User Guide (UG860)

Document_ID
UG860
Release_Date
2026-07-27
Revision
v1.3 English

The Mode pins M[2:0] should be tied and static during configuration. The FPGA reads the modes pins at power-up to determine which configuration mode to use. JTAG mode is most commonly used for debugging. In Spartan UltraScale+ FPGAs you must set the mode to JTAG if you want to configure in this configuration mode. If a non-JTAG mode is selected at power-up, the system must wait for a configuration attempt (either successful or failure) before the user can send attempt a JTAG configuration or the user must issue a JTAG instruction JPROG.