The master SPI configuration mode in AMD Spartan™ UltraScale+™ FPGAs enables the use of low pin count, industry-standard SPI NOR flash devices for programmable device image (PDI) storage. The FPGA supports a direct connection to the SPI interface of a NOR flash device for reading a stored PDI. See Vivado Design Suite User Guide: Programming and Debugging (UG908) for supported flash with each FPGA.