Introduction - Introduction - UG860

Spartan UltraScale+ FPGAs Configuration User Guide (UG860)

Document_ID
UG860
Release_Date
2026-07-27
Revision
v1.3 English

Select AMD Spartan™ UltraScale+™ FPGA design elements provide access to configuration-related features during device operation, after the initial configuration is complete. These design elements must be instantiated in the design. Most should only be used in specific situations that require them.

The following design primitives are related to configuration features and described in this chapter. Information on these and other primitives are also found in the Spartan UltraScale+ Libraries Guide (UG1704). These primitives all require instantiation in a design. Instantiation templates are found in the Libraries Guide and in the AMD Vivado™ language templates.

Important: FRAME_ECCE4 and ICAPE3 should only be instantiated through use of the soft error mitigation (SEM) IP.