Fallback and MultiBoot Solution - Fallback and MultiBoot Solution - UG860

Spartan UltraScale+ FPGAs support fallback and MultiBoot.

The default fallback feature allows the FPGA to boot and configure from a different PDI than the initial PDI at address 0x00000000. If the BootROM does not find a valid boot header at the initial address, a fallback will be triggered. When a fallback occurs, the PMC_MULTI_BOOT register will be incremented by 1 and the device RST_PMC soft reset will be issued. This will cause the BootROM to search the next 32KB address increment for a valid boot header. The BootROM will increment the search until a valid header is seen or until the search limit Table 1 for the configuration mode is met. Conditions that can trigger a fallback include: validation identification signature XLNX (0x584C4E58) not found, the PLM offset/length word is corrupted, authentication or encryption failure, or an IDCODE error is seen.

Figure 1. Fallback Example Flow

The MultiBoot feature also enables the FPGA to boot and configure from a different PDI than the initial PDI at address 0x00000000. The MultiBoot feature must be enabled in the user design. To enable the MultiBoot feature the user design must write to the PMC_MULTI_BOOT register (PMC_MULTI_BOOT value * 0x00008000 is the address used) and write a 1 to the RST_PMC register to issue a soft reset. For register details, refer to the Spartan UltraScale+ Register Reference (UG1679), or the Design Security Lounge for the Spartan UltraScale+ Register Reference with Security Registers (UG1680) and the Spartan UltraScale+ SU45P-SU200P Register Reference Security Registers (UG1687).

Figure 2. MultiBoot Example Flow

If a Master SPI or Master OSPI configuration attempt fails, the JTAG_STATUS register [14:12] internal configuration mode setting is changed to JTAG mode to enable debug.

The configuration modes that support fallback and multiboot and the maximum search limit for each mode is provided in the following table.