FUSE_CLK - FUSE_CLK - UG860

Spartan UltraScale+ FPGAs Configuration User Guide (UG860)

Document_ID
UG860
Release_Date
2026-07-27
Revision
v1.3 English

The eFUSE programming operations require a clock source to be supplied through either the EMCCLK pin or FUSE_CLK primitive. See the Spartan UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS930) for eFUSE programming clock requirements.

Important: The DNA_PORTE2 and the FUSE_CLK primitives cannot be used in the same design.