Spartan UltraScale+ FPGAs PMC dedicated configuration controller executes the BootROM and PLM. If the BootROM or the PLM detect an issue during the boot and configuration process an error code will be generated in the JTAG ERROR_STATUS register. See ERROR_STATUS Register for details on the bit fields. The error is logged in the format detailed in the following table.
| Register Name | Bit Field | Error Description |
|---|---|---|
| ERROR_STATUS | 60:55 | Reserved |
| 54:43 | First Error | |
| 42:31 | Last Error |
If a BootROM or PLM error is encountered during programming it can be analyzed and decoded in Vivado using the utility called pdi_dbg_util. This tool can perform the error code value look-up, PDI log analysis, and PDI programming and analysis. By using pdi_dbg_util, you can efficiently gather all the necessary information on a programming error to resolve Spartan UltraScale+ FPGA issues. For the latest error code analysis, see the Debugging PDI Programming with pdi_dbg_util section in Vivado Design Suite User Guide: Programming and Debugging (UG908).