The Spartan UltraScale+ FPGAs support encrypted and authenticated secure configuration to provide a high degree of design security. Two hardware root of trust (HWRoT) secure configuration modes are implemented to support the use of asymmetric authentication (I.e., public key) or symmetric authentication and encryption when configuring the device. The two root of trust modes are not mutually-exclusive. Each has its own set of rules. If both modes are used together, the rules enforced by the secure configuration are the combination rules from both root of trust modes.
Asymmetric Hardware Root of Trust (A-HWRoT) secure configuration forces the use of asymmetric authentication with optional encryption when configuring the device. Using A-HWRoT ensures authenticity and integrity of the programmable device image (PDI). Coupling the use of encryption with A-HWRoT provides confidentiality of the PDI. In Spartan UltraScale+ FPGAs, asymmetric authentication of the PDI is done using post-quantum cryptography (PQC) or in some devices ECDSA P-384. See Table 1 for details.
Symmetric Hardware Root of Trust (S-HWRoT) secure configuration forces the use of symmetric authentication and encryption when configuring the device to provide authenticity, integrity, and confidentiality. The S-HWRoT achieve authenticity of the image via the GCM mode of AES-256 by encrypting all portions of the PDI, excluding the boot header and the Hash Block. With S-HWRoT, the Hash Block is authenticated as additional authenticated data (AAD). The authenticated hash block data is used to validate the integrity of the PDI.
Spartan UltraScale+ FPGAs support dynamic power analysis (DPA) countermeasures of AES HW masking, key rolling, and authentication before decryption.