Configuration Sequence - Configuration Sequence - UG860

The platform management controller (PMC) supports security features and configuration. While each of the configuration mode interfaces differ, the basic steps for configuring a device is the same for all configuration modes. See the following figure for the configuration sequence phases of the PMC hardware, BootROM, and Platform Loader and Manager (PLM).

Phase 1: PMC Hardware (Power-Up and Reset)

In phase 1, the PMC hardware detects the power is valid and the PROGRAM_B pin is released to initiate the configuration sequence. After power is applied to the device, the configuration hardware performs a series of tasks to capture the mode selection at the pins, initialize to a known secure state, and all registers in the PMC are zeroized (reset + verification of reset state) if enabled through eFUSEs. Before execution of the BootROM, the dedicated hardware hashes the immutable BootROM code using a dedicated SHA-3/384 engine and compares the calculated cryptographic hash against a golden copy stored in the device. If the hashes match, the integrity of the BootROM is validated, and the BootROM is enabled to execute.

Phase 2: BootROM (Initialization and PLM Load)

In phase 2, the BootROM waits for the INIT_B pin to go high and then performs basic integrity checks, performs initialization of the programmable logic, and reads the mode register to start the configuration setup. The BootROM searches for the identification signature XLNX (0x584C4E58). After the identification signature is found, the boot header and hash block are read into the device. If authentication is enabled, the hash block is authenticated. The boot header checksum is validated against the checksum in the hash block. Next the PLM is loaded and it's checksum is validated against its checksum value in the hash block. If the PLM is encrypted, then it is decrypted before the bootROM hands off the process to PLM. The BootROM code enforces the secure boot modes (A-HWRoT and/or S-HWRoT) if enabled.

If a boot identification signature is not found at address 0x00000000, then master modes conduct a fallback by default and increment to the next 32KB address in memory. At the new address, the BootROM will search again for the signature. This process continues until the search limit for the configuration mode is met. See Fallback and MultiBoot Solution and Table 1 for more information.

Phase 3: PLM (PDI Image Processing and Configuration)

In phase 3, the PLM is responsible to complete the PDI image processing and load as well as ensure the PL starts up and asserts DONE. Phase 3 includes the PL startup and these steps: