Spartan UltraScale+ FPGAs use a proprietary programmable device image (PDI) file format to boot and configure. The AMD Vivado development platform generates the PDI. For more information on the PDI, see Design Tools.
The programmable device image (PDI) includes a fixed implementation of the boot header and the platform loader and manager (plm.elf), and a user design programmable logic (PL) configuration data (.rcdo). The maximum size for a specific device PDI image can be affected by PDI generation options, such as compression. Compressed images can change in size between design iterations so memory space should be reserved for the full uncompressed PDI size. In addition, security features can affect the image size. For security features, a general guideline would be to triple the boot and PL contributors for an image size estimation.
| PDI Contributor | Maximum Size (bits) |
|---|---|
| Boot Header | 6,656 |
| PLM (.elf) for SU10P, SU25P, SU35P | 331,776 |
| PLM (.elf) for SU45P, SU60P, SU65P, SU100P, SU150P, SU200P | 593,920 |
| Device | PL Configuration Maximum Size (bits) |
|---|---|
| SU10P | 10,606,464 |
| SU25P | 10,606,464 |
| SU35P | 10,606,464 |
| SU45P | 19,922,944 |
| SU60P | 19,922,944 |
| SU65P | 29,360,128 |
| SU100P | 29,360,128 |
| SU150P | 57,817,728 |
| SU200P | 57,817,728 |