The eight ports (four read and four write) compete to get the DDRC to accept their request. The arbiter grants a request based on many factors. Read and write requests are treated the same, meaning they go through the same arbitration. Each port maintains a priority level that steadily moves from a preset state to the highest state or 0. This mechanism is important to maintain a minimum bandwidth on a port. Each port also has different ways to signal an urgent situation, either on a per-transaction basis (QoS) or for multiple transactions. The per-transaction urgency can be good for low-latency masters.
The priority as shown in the following figure has the following logic. If there is a port with Priority 0 or 0 in its aging counter (the highest priority), then it wins. If there is no port with 0 priority, the arbitration checks if the port being serviced has a page match. If there is no page match, the lowest value in the aging counter wins. If there is a tie for the lowest value in the aging counter, round robin is used to resolve any ties.