The effects of various resets are described in
Table: Reset Effects
.
Table 26-1:
Reset Effects
|
Reset Name
|
Source
|
Portion of System that is Reset
|
RAMs Cleared
|
slcr.REBOOT_STATUS Bits set = 1
|
|
Power-On Reset (PS_POR_B)
|
Device pin
|
Entire chip, including debug (All)
The PL must be re-programmed.
|
All
|
[POR]
|
|
Security Lock Down
(requires a power-on reset to recover)
|
DevC
|
All
|
N/A
|
|
External System Reset (PS_SRST_B)
|
Device pin
|
All except debug and persistent registers.
The PL must be re-programmed.
|
All
|
[SRST_RST]
|
|
System Software
|
SLCR
|
All
|
[SLC_RST]
|
|
System Debug Reset
|
JTAG
|
All
|
[DBG_RST]
|
|
System Watchdog Timer
|
SWDT
|
All
|
[SWDT_RST]
|
|
CPU0 and CPU1 Watchdog Timers
(when slcr.RS_AWDT_CTRL{1,0} =
0
)
|
AWDT
|
All
|
[AWDT{1,0}_RST]
|
|
CPU0 and CPU1 Watchdog Timers
(when slcr.RS_AWDT_CTRL{1,0} =
1
)
|
AWDT
|
CPU (s) only.
|
None
|
N/A
|
|
Debug Reset
|
JTAG
|
Debug logic.
|
None
|
N/A
|
|
Peripherals
|
SLCR
|
Selected peripherals or CPUs.
|
None
|
N/A
|