Register (slcr) FPGA0_THR_CNT - Register (slcr) FPGA0_THR_CNT - 1.15 English - UG585

Zynq 7000 SoC Technical Reference Manual (UG585)

Document_ID
UG585
Release_Date
2026-02-06
Version
1.15 English
Name FPGA0_THR_CNT
Relative Address 0x00000178
Absolute Address 0xF8000178
Width 32 bits
Access Type rw
Reset Value 0x00000000
Description PL Clock 0 Throttle Count control