Register (sdio) Clock_Control_Timeout_control_Software_reset - Register (sdio) Clock_Control_Timeout_control_Software_reset - 1.15 English - UG585

Zynq 7000 SoC Technical Reference Manual (UG585)

Document_ID
UG585
Release_Date
2026-02-06
Version
1.15 English
Name Clock_Control_Timeout_control_Software_reset
Relative Address 0x0000002C
Absolute Address

sd0: 0xE010002C

sd1: 0xE010102C

Width 27 bits
Access Type mixed
Reset Value 0x00000000
Description

Clock Control register

Timeout control register

Software reset register