Register XEMACPS_RX512CNT_OFFSET Details - Register XEMACPS_RX512CNT_OFFSET Details - 1.15 English - UG585

Zynq 7000 SoC Technical Reference Manual (UG585)

Document_ID
UG585
Release_Date
2026-02-06
Version
1.15 English

Statistical counter for frames of 512 to 1023 bytes in length that are received without an error and exclude pause frames. Refer to the FRAMES_RX register for additional information.

Field Name Bits Type Reset Value Description
  31:0 ro 0x0 512 to 1023 byte frames received without error. A 32 bit register counting the number of 512 to 1023 byte frames successfully received without error. Excludes pause frames, and is only incremented if the frame is successfully filtered and copied to memory.