The controller registers include configuration constants, capability constants and operational registers for EHCI compatibility (Host mode) and non-EHCI functions (Device and OTG modes). The non-EHCI registers support device mode and OTG functions. The EHCI register fields are overlaid into the controller’s register set.
- OTG/Mode registers provide control and status for HNP and SRP.
- Dev register is used by the device controller driver software (DCD).
- Host register is used by the host controller driver software (HCD).
- EHCI register includes content from the specification. ‘x’ means partial. ‘ex’ means exclusive.
| Offset Address | Register Name | OTG/ Mode | Dev | Host | EHCI | Type | Affected by USBCMD Reset | |
|---|---|---|---|---|---|---|---|---|
| Bit Acronym | ||||||||
| Identification: Configuration Constants. | ||||||||
| 0x0000 | ID | x | x | x | RO | no | ||
| 0x0004 | HWGENERAL | x | x | x | RO | no | ||
| 0x0008 | HWHOST | ~ | ~ | x | RO | no | ||
| 0x000C | HWDEVICE | ~ | x | ~ | RO | no | ||
| 0x0010 | HWTXBUF | ~ | x | x | RO | no | ||
| 0x0014 | HWRXBUF | ~ | x | x | RO | no | ||
| General Purpose (GP) Timers. | ||||||||
| 0x0080/88 | GPTIMER{0,1}LD | x | x | x | ~ | rw | yes | |
| 0x0084/8C | GPTIMER{0,1}CTRL | x | x | x | ~ | mixed | yes | |
| AXI Interconnect | ||||||||
| 0x0090 | SBUSCFG | x | x | x | ~ | RW | yes | |
| Capability: Controller and EHCI Capabilities Constants (IP Configuration Constants). | ||||||||
| 0x0100 | CAPLENGTH_HCIVERSION | x | x | x | x | RO | no | |
| 0x0104 | HCSPARAMS | x | ~ | x | ex | RO | no | |
| 0x0108 | HCCPARAMS | ~ | ~ | x | ex | RO | no | |
| 0x0120 | DCIVERSION | x | x | x | RO | no | ||
| 0x0124 | DCCPARAMS | x | x | RO | no | |||
| Operational: Interrupts, Schedule Pointers (Host), and Endpoint Pointers (Device). | ||||||||
| 0x0140 | USBCMD | x | x | x | x | RW | yes | |
| 0x0144 | USBSTS, refer to the following table. | x | x | x | x | RW, R/W1C, RO | yes, except RO | |
| 0x0148 | USBINTR | x | x | x | ex | RW, R/W1C, RO | yes, except RO | |
| 0x014C | FRINDEX | ~ | x | x | x | RW | yes | |
| 0x0154 | PERIODICLISTBASE_ | ~ | ~ | x | ex | RW | yes | |
| _DEVICEADDR | ~ | x | ~ | ~ | RW | yes | ||
| 0x0158 | ASYNCLISTADDR_ | ~ | ~ | x | ex | RW | yes | |
| _ENDPOINTLISTADDR | ~ | x | ~ | ~ | RW | yes | ||
| Operational: Transaction Translator. | ||||||||
| 0x015C | TTCTRL | ~ | ~ | x | ~ | RW, RO | yes, except RO | |
| Operational: Misc. | ||||||||
| 0x0160 | BURSTSIZE | x | x | x | ~ | RW | yes | |
| 0x0164 | TXFILLTUNING | RW, R/W1C | yes | |||||
| 0x0168 | TXTTFILLTUNING | RW, R/W1C | yes | |||||
| 0x016C | IC_USB | x | x | x | ~ | RW | yes | |
| 0x0170 | ULPI_VIEWPORT | x | x | x | ~ | RW, RO | yes, except RO | |
| Operational: Endpoint Control (Device mode), refer to Endpoint Registers for details. | ||||||||
| 0x0178 | ENDPTNAK | x | ~ | ~ | R/WTC | |||
| 0x017C | ENDPTNAKEN | x | ~ | ~ | RW | |||
| Operational: Host mode (EHCI) and Device mode. | ||||||||
| 0x0180 | CONFIGFLAG | x | x | x | x | RO | ||
| 0x0184 | PORTSC1 | x | x | x | x | RW, RO, R/W1C | partial | |
| [WKDS] [WKCN] [WKOC] | no | |||||||
| [PIC] [PR] | no | |||||||
| others | yes | |||||||
| Operational: Mode Control. | ||||||||
| 0x01A4 | OTGSC | x | ~ | ~ | ~ | RW, RO, R/W1C | no | |
| 0x01A8 | USBMODE | x | x | x | ~ | RW | yes | |
| Endpoint Configuration and Control (Device mode), refer to Endpoint Registers for details. | ||||||||
| 0x01AC | ENDPTSETUPSTAT | ~ | x | ~ | ~ | R/W1C | yes | |
| 0x01B0 | ENDPTPRIME | ~ | x | ~ | ~ | R/W1S | yes | |
| 0x01B4 | EMDPTFLUSH | ~ | x | ~ | ~ | R/W1S | yes | |
| 0x01B8 | ENDPTSTAT | ~ | x | ~ | ~ | RO | no | |
| 0x01BC | ENDPTCOMPLETE | ~ | x | ~ | ~ | R/W1C | yes | |
| 0x01C0 | ENDPTCTRL 0 | ~ | x | ~ | ~ | RW, RO | yes, except RO | |
|
0x01C4 to 0x01EC |
ENDPTCTRL {1 to 11} | ~ | x | ~ | ~ | RW, R/W1C | yes | |